It’s open source nature protects against that. People mistake Linus as being in the same boat as Stallman but Linus was only open source by circumstance, he kind infamously doesn’t seem to appreciate the role open source played in his own success.
It already directly addresses the mistakes of x86 and ARM. I don’t know what he is so worried about.
I’ll say to you what I said to the other commentor: RISC-V is an ISA, nothing less, nothing more, and it is 100% open-source. It is not trying to be anything else. Yes, hardware implementations from processor vendors can have different licensing and be proprietary, but that is not the fault of RISC-V, nor does that have anything else to do with it. RISC-V, as an ISA, and only an ISA, is completely open-source and not liable for the bs of OEMs.
What I read here is just a vague critic from him of the relation between hard- and software developer. Which will not change just because the ISA is open source. It will take some iterations until this is figured out, this is inevevable.
Soft- and hardware developers are experts in their individual fields, there are not many with enough know-how of both fields to be effective.
Linus also points out, that because of ARM before, RISC-V might have a easier time, on the software side, but mistakes will still happen.
IMO, this article doesn’t go into enough depths of the RISC-V specific issues, that it warrants RISC-V in the title, it would apply to any up and coming new ISA.
It’s open source nature protects against that. People mistake Linus as being in the same boat as Stallman but Linus was only open source by circumstance, he kind infamously doesn’t seem to appreciate the role open source played in his own success.
It already directly addresses the mistakes of x86 and ARM. I don’t know what he is so worried about.
Only the core part of the ISA is open source. Vendors are free to add whatever proprietary extensions they want and sell the resulting CPU.
You might get such a CPU to boot, but getting all functionality might be the same fight it is with arm CPUs currently.
I’ll say to you what I said to the other commentor: RISC-V is an ISA, nothing less, nothing more, and it is 100% open-source. It is not trying to be anything else. Yes, hardware implementations from processor vendors can have different licensing and be proprietary, but that is not the fault of RISC-V, nor does that have anything else to do with it. RISC-V, as an ISA, and only an ISA, is completely open-source and not liable for the bs of OEMs.
Protects against what?
What I read here is just a vague critic from him of the relation between hard- and software developer. Which will not change just because the ISA is open source. It will take some iterations until this is figured out, this is inevevable.
Soft- and hardware developers are experts in their individual fields, there are not many with enough know-how of both fields to be effective.
Linus also points out, that because of ARM before, RISC-V might have a easier time, on the software side, but mistakes will still happen.
IMO, this article doesn’t go into enough depths of the RISC-V specific issues, that it warrants RISC-V in the title, it would apply to any up and coming new ISA.